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Physical Design Engineer / Sr. Engineer/ Technical Manager (APR)

Physical Design Engineer / Sr. Engineer/ Technical Manager (APR)

VLSI Physical Design
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詳細介紹
Responsibilities:
1) Executing Floor planning/ Design closures on timing/ DFM as well as physical verifications.
2) Tape-out with multi-million gates count SOC design on leading edge technologies.
3) Develop physical design flows/solutions on the latest cutting-edge technology node.

Qualifications & Requirements:
1) Min. Master degree majoring in EE/ CE/ CS related fields.
2) At least 3-4 years of experiences in VLSI field for Designer and Technical Manager positions, respectively.
3) Experience in tape-out with multi-million gates count SOC design, 5/7/10 nm design experience is a plus.
4) Solid skill sets of one of Cadence(Innovus) EDA tools.
5) Capable of executing floor planning, PnR timing closure and physical verifications.
6) Proficiency in speaking and writing English is a plus.
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